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DTSTART;TZID=America/Los_Angeles:20260928T104000
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DTSTAMP:20260921T181823Z
CREATED:20260921T181641Z
LAST-MODIFIED:20260921T181823Z
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SUMMARY:ECE 290 Seminar: "Where The Semiconductor Industry Is Headed Over The Next 5\, 10\, 20 Years?"
DESCRIPTION:Presented by: Dr. Victor Zhirnov\, Product Ideation Head @ Applied Materials \nDescription: “Information and Communication Technologies (ICT) are a primary engine of socioeconomic growth in the modern world. Electronic information processing and transmission are being further accelerated by the rapid advancement of Artificial Intelligence (AI). The adoption of AI continues to expand at an unprecedented pace\, driven by the exponential growth of data that must be generated\, moved\, stored\, computed\, communicated\, secured\, and ultimately transformed into actionable information for end users. \nToday\, ICT is undergoing several major “seismic shifts\,” as outlined in the Decadal Plan for Semiconductors. One of the most significant challenges is the growing imbalance between the energy demands of information and communication technologies and the world’s capacity for energy production. This trend introduces substantial risks to future technological progress\, particularly for AI systems\, whose computational and data-processing requirements continue to increase dramatically. Addressing these challenges will require the discovery of fundamentally new paradigms capable of delivering orders-of-magnitude improvements in energy efficiency. \nA second seismic shift is the widening gap between communication capacity and data generation. Modern society is characterized by near-ubiquitous connectivity\, enabling continuous access to information\, cloud storage\, and cloud computing resources. The ability to access data from virtually anywhere and share it globally has transformed business operations\, scientific research\, and everyday life. However\, the cloud-centric model relies heavily on the assumption of constant and reliable connectivity\, an assumption that cannot always be guaranteed. At the same time\, global data generation is growing faster than communication infrastructure can support\, creating an increasing mismatch between information storage requirements and communication capabilities. Overcoming this challenge will require radical advances in communication technologies. \nInventing the next generation of computation and communication paradigms is undoubtedly a formidable challenge. Nevertheless\, it is achievable if the right scientific questions are identified and the necessary resources are mobilized. Future ICT systems will require breakthrough innovations based on largely unexplored physical principles\, spanning materials\, devices\, circuits\, architectures\, and system-level functions. Such advances have the potential to redefine the foundations of information processing and communication\, enabling sustainable growth of AI and the broader digital economy.” \nBio: Victor Zhirnov is the Product Ideation Head at Applied Materials\, where he leads the initiation of breakthrough innovation projects with the potential to enable major technology inflections across the semiconductor industry. His work focuses on identifying and advancing disruptive concepts that can shape the future of computing\, communications\, and advanced manufacturing. \nPrior to joining Applied Materials\, Dr. Zhirnov served as Chief Scientist at the Semiconductor Research Corporation (SRC). In that role\, he was responsible for envisioning and developing long-term research directions for the semiconductor ecosystem\, guiding collaborations between industry and academia in semiconductor technologies. \nWith more than 30 years of semiconductor experience\, Dr. Zhirnov has made significant contributions across a broad range of disciplines\, including materials science\, process technology\, device physics\, and the exploration of the fundamental limits of semiconductor technologies. \nDr. Zhirnov has played a leading role in several major international technology roadmapping efforts. He served as Chair of the Emerging Research Devices Working Group for the International Technology Roadmap for Semiconductors (ITRS) and has also led the development of both the 2030 Decadal Plan for Semiconductors and the Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap. \nHe earned an M.S. in Applied Physics from the Ural Polytechnic Institute in Yekaterinburg\, Russia\, in 1989\, and a Ph.D. in Solid State Electronics and Microelectronics from the Institute of Physics and Technology in Moscow in 1992. \nDr. Zhirnov has authored or co-authored approximately 200 technical papers and numerous contributions to books\, reflecting his longstanding influence on semiconductor research\, technology strategy\, and innovation. \nHosted by: Professor Marco Rolandi & Professor Soumya Bose\, Electrical & Computer Engineering Department \nWhen: 10:40 to 11:45 AM PST \nLocation: Classroom E2-194 \nZoom Link: https://ucsc.zoom.us/j/98247592428?pwd=iUrZFuvQ8ANPqirWLxC4DokeyvIUIz.1
URL:https://live-events-ucsc.pantheonsite.io/event/ece-290-seminar-where-the-semiconductor-industry-is-headed-over-the-next-5-10-20-years/
LOCATION:Engineering 2\, Engineering 2 1156 High Street\, Santa Cruz\, CA\, 95064
CATEGORIES:Seminars
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DTSTART;TZID=America/Los_Angeles:20260928T160000
DTEND;TZID=America/Los_Angeles:20260928T170000
DTSTAMP:20260915T205202Z
CREATED:20260915T205202Z
LAST-MODIFIED:20260915T205202Z
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SUMMARY:Statistics Seminar: Vecchia Approximated Bayesian Heteroskedastic Gaussian Processes
DESCRIPTION:Presenter: Parul Patil\, Postdoctoral Researcher\, UC Santa Cruz \nDescription: Many computer simulations are stochastic and exhibit input dependent noise. In such situations\, heteroskedastic Gaussian processes (hetGPs) make ideal surrogates as they estimate a latent\, non-constant variance. However\, existing hetGP implementations are unable to deal with large simulation campaigns and use point-estimates for all unknown quantities\, including latent variances. This limits applicability to small experiments and undercuts uncertainty. We propose a Bayesian hetGP using elliptical slice sampling (ESS) for posterior variance integration\, and the Vecchia approximation to circumvent computational bottlenecks. We show good performance for our upgraded hetGP capability\, compared to alternatives\, on a benchmark example and a motivating corpus of more than 9-million lake temperature simulations. An open source implementation is provided as bhetGP on CRAN. \nAbout the speaker: Parul Patil is currently working as a post-doctoral researcher with Dr Paul Parker and Dr Sangwon Hyun at University of California\, Santa Cruz. She completed her PhD in May 2026 from Virginia Tech. She had previously completed B.Sc. and M.Sc. in Statistics in India. She works with large-scale data\, using statistical tools to model complex processes\, quantify uncertainty\, and uncover patterns. Her work lies at the intersection of statistics and machine learning with ecological applications\, focusing on scalable methods for analyzing high-dimensional and spatially structured data. \nThis seminar is hosted by Professor Yunyi Shen.
URL:https://live-events-ucsc.pantheonsite.io/event/statistics-seminar-vecchia-approximated-bayesian-heteroskedastic-gaussian-processes/
LOCATION:Jack Baskin Engineering\, Baskin Engineering 1156 High Street\, Santa Cruz\, CA\, 95064
CATEGORIES:Lectures & Presentations,Seminars
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